Normally, jitter is related to domain changes - i.e. when going from the digital to the analog domain or vice versa.
This is also why keeping the signal in one domain for as long as possible per definition is the best solution.
However, one of the most important factors in digital signal processing is the "purity" of the clock, in other words, ensuring that the master clock that controls everything is extremely stable and correctly placed (electrically as close as possible to where the clock frequency is needed).
In every one of our R&D tests we have concluded that keeping phase noise as low as possible in the clock system is the single most important factor in minimising jitter. Typically jitter is heard as high frequency distortion. That's why we have always given the design of the clock a very high priority - in fact this is one of Lyngdorf core competencies!
We employ specialised low-noise design techniques to reduce digital interference and to give better working conditions for critical parts such as the modulator (PCM -> PWM) and converters, which are especially sensitive to noise.
To minimise jitter further, the sample rate of the input signal is measured to determine the exact sample rate where after it is re-sampled to match the master clock (although the input is stated at e.g. 96kHz it can easily "float" slightly both up and down).
The result of this meticulous design philosophy speaks for itself, as a pure, clean and natural sound reproduction.
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